1. Field of the Invention
The present invention is generally in the field of control systems. More specifically, the present invention is in the field of use of pulse width modulation in a control system. This specification herein exemplifies the present invention by an open loop, and subsequently, a closed loop digital power supply embodying voltage or current regulation.
2. Background Art
For more than half a century, control system engineers have implemented pulse width modulation schemes for driving a regulated voltage or current from a control plant. Control system engineers of ordinary skill in the art have long since designed digital open loop pulse width modulation control schemes to power loads that do not require precise voltage or current regulation. These digital open loop pulse width modulation control systems generally have powered loads such as DC motors, or heating elements, or other inductive and/or resistive loads which tolerate a system step response exhibiting large overshoot, for instance in excess of fifty percent beyond the set-point. Given a load that tolerates such step responses of extreme overshoot, digital open loop pulse width modulation design offers advantages of substantial cost savings in terms of reduced component count and ease of implementation due to modest design complexity.
Recently, advances in semiconductor integrated circuit fabrication processes have given rise to integrated circuits requiring separate power supplies for various parts including a voltage for the input/output pad ring, and a second, unique power supply voltage for the digital core. While this advancement brings the advantage of reduced core power consumption, there arises the problem of regulation of these additional voltages. With the advent of system-on-chip technologies, designers of these devices have only begun to address this requirement for regulating multiple power supply domains on-chip. U.S. Pat. No. 6,940,189 addresses an implementation of a digital open loop pulse width modulation control system as an optimal means to reduce costs and enhance power efficiency of the total system-on-chip solution. The aforementioned reference patent does not address the problem of overshoot in the step response of the switch mode power supply powering the core voltage domain. The semiconductor core voltage exemplifies a capacitive and resistive load requiring precise regulation of voltage and thus typically tolerates voltage excursions of five percent or less beyond its given set-point.
Therefore, there exists a need for a novel low cost, high power efficiency, and reliable pulse width modulation algorithm that overcomes the problem of overshoot in step response while providing power to loads typically requiring precise regulation such as semiconductor cores.